SoC STA/Timing Engineer (Senior Staff/Principal)

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
  
  
  

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Job Description

• 12 to 20 years of relavant experience is a must
• STA Setup & Signoff: Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs for SoC & SubSystem
• Timing Analysis & Debug: Validate and debug timing across multiple PVT conditions using tools like PrimeTime and Tempus.
• Flow Optimization: Run STA flows and correlate Spice to STA results.
• Methodology Development: Evaluate timing methodologies/tools across technology nodes and automate STA/PD flows using TCL/Perl/Python.
• Cross-Functional Collaboration: Work closely with design, DFT, synthesis, technology, CAD and physical implementation teams.
• Low-Power Techniques: Knowledge of clock gating, power gating, and multi-voltage designs.
• ECO Timing Flow: Handle timing ECOs (DMSA, tweaker, PrimeClosure) and logical equivalence checks (RTL to Netlist).
  
  
  

Required Skills

• Strong expertise in STA fundamentals, AOCV/POCV concepts, CTS, and timing constraints.
• Hands-on experience with STA tools: PrimeTime, Tempus.
• Familiarity with ASIC back-end flows: ICC2, Innovus.
• Knowledge of signal integrity, cross-talk noise, and parasitic extraction.
• Scripting proficiency: TCL, Perl, Python.
• Mentoring junior engineers in different areas of timing flows and methodologies
• Understanding of Spice simulations: Hspice, FineSim, Monte Carlo analysis.
  
  
  

Preferred Experience

• Driving timing convergence at chip-level and hard-macro level.
• Exposure to RTL-to-GDSII flows.
• Good technical writing and communication skills for cross-team collaboration
  
  
  

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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