Design Verification Engineer
Fiori Technology Solutions Inc
Date: 2 weeks ago
City: Hyderabad, Telangana
Contract type: Full time
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Design Verification Engineer
We are looking to fill multiple Design Verification openings. We are headquartered in Dallas, USA and have office in Hyderabad, India.
Welcome to a growing team that tests and validates new semiconductor packages. Our exciting IC product lines require thorough and accurate testing to develop detailed wafer maps which identify components that are suitable for production and manufacturing. In this role, you will be a member of a team with an open and collaborative work environment.
Must Have Skills
Design Verification Engineer
- Hyderabad, India
- 5+ Years
- Full-Time
We are looking to fill multiple Design Verification openings. We are headquartered in Dallas, USA and have office in Hyderabad, India.
Welcome to a growing team that tests and validates new semiconductor packages. Our exciting IC product lines require thorough and accurate testing to develop detailed wafer maps which identify components that are suitable for production and manufacturing. In this role, you will be a member of a team with an open and collaborative work environment.
Must Have Skills
- Ability to write DV plans and interact with designer throughout the process.
- UVM – creating UVM test benches from scratch.
- Having experience with System Verilog.
- Use existing design and create a spin.
- Digital verification for complex SoC with MCUs (ARM CM0+/CM3/4/CM33) with complex peripherals, hardware accelerators, memory architectures, bus architectures
- Familiar with SoC development flow and environments
- Have experience with mixed signal circuits: ADCs/DACs, OSCs, clock trees, power management circuits together with digital IPs
- Working experience with mixed simulation environment (Digital + Analog model)
- Nice to have: Exposure to DPLL/Synthesizer kind of design will make it easier to ramp up.
- Nice to have: Exposure to cadence simulation tools and debugging (simulation, regression, coverage analysis, GLS)
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